stage gain
英 [steɪdʒ ɡeɪn]
美 [steɪdʒ ɡeɪn]
网络 级增益
双语例句
- Power efficiency is optimized by size scaling down scheme using low power single stage cascode amplifier with a gain boosted structure.
采用了低功耗的增益自举单级折叠级联运放，器件尺寸逐级减小进一步优化功耗。 - The association of protein polymorphism with birth weight and early stage daily gain in pig
甘肃黑猪血浆蛋白多态性与初生重、早期日增重关系的研究 - NDT and DSP technology are close connected. The importance of signal processing stage is not inferior to signal gain stage.
无损检测技术与数字信号处理技术紧密相连，并且信号处理阶段的重要性丝毫不亚于信号的获取阶段。 - The input stage of the first-stage amplifier is designed according to the minimum noise coefficient matching, and the output stage is designed according to the maximum gain matching.
第一级放大器的输入级按照最小噪声系数匹配进行设计，输出按最大增益匹配进行设计。 - An optimal design of CMOS in fully differential two stage OTA is presented in this paper. The OTA contains a folded-cascode input stage and a common-source output gain stage. Cascode compensation technique and switched capacitor common mode feedback technique are used.
介绍了一种CMOS全差分两级OTA，第一级为折叠级联放大器，第二级为共源输出增益级，OTA技术采用了级联密勒电容补偿技术和开关电容共模反馈技术。 - The results show that the grain production in Henan province is still in the traditional agriculture stage, where to increase gain production mainly mainly relys on the increase of conventional input factors.
结果表明河南省粮食生产仍处于传统农业阶段，主要依靠常规投入要素来增加产量。 - As parenteral alimentation may easily cause ductus-related infection and "excessive nutrition", it should be emphasized that it is safe and effective to put nasojejunal tube below Treitz ligament in the early stage to gain enteral nutritional support.
因肠外营养易发生导管相关性感染及过度营养的问题，故强调早期放置鼻空肠管到Treitz韧带下方进行肠内免疫营养支持是安全有效的。 - It points out that during the compensation process the energy spectra of electron beam cluster is compressed, the electron number density distribution in the beam cluster modulated, which enables the realization of the oscillation of the second stage FEL and significant increase of practical gain per pass.
指出在补偿过程中电子束团的能谱将被压缩、束团中的电子数密度分布将被调制，从而能够实现二阶自由电子激光振荡，并且可以大大提高实际单程增益。 - The design of a fully differential CMOS sampling holding circuit and inter stage subtract gain circuit used in 10 bit 30 M sample/ s pipelined ADC is presented in this paper.
介绍一种10位分辨率、30MHz采样频率流水线操作A/D变换器中的CMOS全差分采样-保持（S/H）电路和级间减法-增益（SUB/GAIN）电路的设计。 - In addition, the same physiological stage of weight gain, after a reasonable consumption will remain at a relatively stable body weight level.
另外，同生理阶段的体重增加，在合理消耗之后会使体重保持在一个相对平稳的水平。